Secure MCU | Secure SoC Megahunt MH1721 - SATRON electronics

Secure SoC Megahunt MH1721

Secure SoC Megahunt MH1721

The MH1721 has internal 32-bit RISC processor with up to 80MHz frequency.
MH1721 has built-in symmetric algorithm encryption engine SCP (supports symmetric encryption algorithms such as DES/AES), asymmetric encryption co-processor ASCP (supports asymmetric algorithms such as RSA/ECC), and also supports Hash algorithms such as SHA160/224/256/384/512. In addition, in order to improve safety and reliability, MH1721 provides various detection mechanisms such as voltage, frequency, temperature, light, voltage glitch, MESH, and tamper-proof.
MH1721 supports MPU (memory protection unit), which can control the access authority to the memory.
MH1721 has built-in 16KB RAM, 256KB FLASH, and integrates various communication interfaces such as USB, SPI, UART, I2C, 7816 Slave, etc. All peripheral driver software is compatible with the current mainstream security chip software interfaces.

  • 32-bit RISC processor:
    - MPU memory protection unit
    - Maximum 80MHz main frequency
    - Support Privilege and unprivileged two operating states
    - Low power consumption design
    Memories:
    - 16KB RAM
    - 256KB FLASH
         --Support page erasing and writing
         --More than 500,000 times of repeated erasing and rewriting, 10-year data retention
         --Page (512B) erasing time 50us
         --Writing 256 bytes time 400us
         --Full erasing time 15ms
    System control module (controls all peripheral module clocks and system-related configurations)
    Security encryption algorithm Co-processor:
    - ASCP Co-processor
         -- Support 512~4096 bits (integer multiple of 64) RSA operation,and support anti-SPA/DPA/FA/DFA function
         -- Support anti-SPA/DPA/FA/DFA function
         -- Support 192/224/256/384/521 bits ECC operation, support anti- SPA/DPA/FA/DFA function
    - DES/AES Co-processor
         -- Support DES/3DES ECB/CBC mode operation
         -- 3DES algorithm supports 2-KEY method
         -- Support anti-SPA/DPA/FA/DFA attack design
    1x UART interface (support 4-wire)
    1x SPI interface (master and slave can be configured)
    1x I2C interface
    1x 7816 Slave interface
    4x 32-bit TIMER
    Integrated internal watchdog
    1x random number generator including true/pseudo-random number generation
    1x DMA controller (supports 2-channel DMA transfer)
    1x CRC module
    Support up to 8 GPIOs
    Internal environment monitoring Sensor (high and low voltage, high and low temperature, MESH, clock, light and voltage glitch detection)
    Support 4-way Tamper (dynamic and static configurable, internal integrated 7.5MΩ
    resistance)
    1x USB1.1 Device, support full speed
    Integrated LDO that can output 70mA drive capability