The SPI protocols use only 4 to 6 signals:
- ChipSelect (CS#)
- Serial Clock (CLK)
- Serial Data
- IO0 (DI)
- IO1 (DO)
- IO2 (WP#)
- IO3 (HOLD# / RESET#)
The MH1064W support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI as well as 2-clocks instruction cycle Quad Peripheral Interface (QPI): Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (WP#), and I/O3 (HOLD# / RESET#). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O and QPI instructions.These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel
A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device ID and SFDP Register, a 64-bit Unique Serial Number and three 256-bytes Security Registers.