Features
Core
- 32-bit Arm® Cortex®-M4F Core with FPU
- Supports DSP instructions and MPU
- Operating frequency up to 240 MHz
Memory
- Up to 1024 KB Flash memory
- Up to 256 KB SRAM
- (SRAM1: 112 KB)
- (SRAM2: 16 KB)
- (SRAM3: 64 KB)
- (CC SRAM1: 64 KB)
- (CC SRAM2: 64 KB, shared with SRAM3)
- Up to 4 KB Backup SRAM
- Supports 512-byte OTP memory
Clock, Reset and Power Management
- 1.8 ~ 3.6 V power supply and I/O pins
- Power-on/Power-down Reset (POR/PDR), Programmable Voltage Detector (PVD)
- 4 ~ 32 MHz crystal oscillator
- Embedded factory-trimmed 16 MHz RC oscillator
- Embedded calibrated 32 kHz RC oscillator
- 32.768 kHz external crystal oscillator for RTC
Low Power Consumption
- Sleep, Stop and Standby modes
- VBAT powers RTC, backup registers and backup SRAM
- 10 standby wake-up pins
DMA: 16-stream DMA Controller
- Integrated controller with FIFO and burst transfer support
I/O Ports
- 117 multi-functional bidirectional I/O pins
- All I/O pins can be mapped to 16 external interrupts
Blank Chip Detection
- Supports ISP operation under Flash boot mode
Debug Interface
- Serial Wire Debug (SWD) and JTAG interface
- Embedded Cortex-M4 Trace Macrocell™
18 Timers
- 8 x 16-bit timers and 2 x 32-bit timers; each timer provides up to 4 channels for input capture, output compare, PWM generation, pulse counting and incremental encoder input
- 3 x 16-bit high-resolution PWM advanced timers with dead-time control and emergency stop for motor control
- 2 x watchdog timers (Independent Watchdog & Window Watchdog)
- System tick timer: 24-bit down-counter
- 2 x 16-bit basic timers
High-Performance Communication Interfaces
- 3 x I2C interfaces (up to 1 MHz)
- 4 x USART interfaces
- 4 x UART interfaces
- 3 x SPI interfaces (2 with I2S function)
- 2 x CAN interfaces (CAN FD supported)
- 1 x 10/100 M Ethernet MAC (MII/RMII supported)
- USB Full-Speed interface (Supports Device / Host / OTG)
- Embedded on-chip PHY
- Operation without external crystal supported
- 1 USB High-Speed interface (Supports Device / Host / OTG)
- Dedicated DMA, on-chip full-speed PHY and ULPI supported
- 8~14-bit parallel camera interface (DCMI)
High-Speed Storage Expansion Interfaces
- 1 general-purpose OSPI interface (Supports indirect mode, status polling mode and memory-mapped mode)
- (SDR / DDR mode supported)
- (Encrypted storage supported)
- 1 general-purpose QSPI interface (Supports indirect mode, status polling mode and memory-mapped mode)
- (SDR / DDR mode supported)
- (Encrypted storage supported)
- 1 SDIO interface
- 1 F(S)MC interface (supports 16-bit external SDRAM expansion)
High-Performance Analog Interfaces
- 3 x 12-bit ADC
- Conversion range: 0 ~ 3.6 V
- Integrated temperature sensor
- Up to 24 external channels
- Max. conversion rate: 5.33 Msps
- Supports internal reference voltage for ADC sampling
- 2 x 12-bit DAC
- 4 x rail-to-rail operational amplifiers (Embedded programmable gain amplification up to 64x)
- 4 x high-speed analog comparators
Graphics Processing Interface
- 1 x 24-bit TFT-LCD parallel interface
- Hardware graphics accelerator DMA2D
Security Features
- Hardware encryption engine (Built-in hardware algorithms: DES, AES, SHA, SM3)
- Complete high-performance algorithm library provided
- PCROP for flash secure read-only execution
- TRNG for true random number generation (Generates 128-bit random number per operation)
Package
- LQFP100
- LQFP144
