AD4S3200732G22-BSSA is DDR4-3200(CL22)-22-22 SDRAM memory module. The SPD is programmed to JEDEC standard latency 3200Mbps timing of 22-22-22 at 1.2V. The module is composed of 16Gb CMOS DDR4 SDRAMs in FBGA package and one 4Kbit EEPROM in 8pin TDFN package on a 260pin glass–epoxy printed circuit board.
The module is a Dual In-line Memory Module and intended for mounting onto 260 pins edge connector sockets. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges of DQS. Range of operating frequencies, programmable latencies and burst lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
Features:
- Power supply (Normal)
VDD & VDDQ = 1.2V ±0.06V
VPP = 2.5V +0.25V / -0.125V
VDDSPD = 2.5V (2.25V to 3.6V) - 1.2V pseudo open-drain I/O
- Burst Length (BL):8 and 4 with Burst Chop(BC)
- Bi-directional, differential data strobe (DQS and /DQS)
- Differential clock input operation
- DLL aligns DQ and DQS transition with CK transition
- Double-data-rate architecture; two data transfers per clock cycle
- 16 internal banks; 4 groups of 4 banks each
- Internal self calibration through ZQ pin (RZQ:240 ohm±1%)
- Self refresh mode / Low-power auto refresh(LPASR) / Temperature controlled refresh(TCR)
- Tc of 0°C to 95°C
- 64ms, 8192-cycle refresh at 0°C to 85°C / 32ms, 8192-cycle refresh at 85°C to 95°C
- 8-bit pre-fetch architecture
- On Die Termination, Nominal, Park, and Dynamic ODT
- Data bus inversion for data bus(DBI)
- Command / Address Parity
- Data bus Write CRC
- Lead-free and Halogen-free products are RoHS Compliant
